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1 for more information www.linear.com/ltm4661 typical application features description 15v, 4a step-up module regulator the lt m ? 4661 is a synchronous step-up switching mode module ? (power module) regulator in a 6.25mm 6.25mm 2.42mm bga package. included in the package are the switching controller, power fets, inductor and all support components. operating over an input voltage of 1.8v to 5.5v, down to 0.7v after start-up, the ltm4661 regulates an output voltage of 2.5v to 15v set by an external resistor. it provides up to 4a switch current. only bulk input and output capacitors are needed. the ltm4661 1mhz switching frequency and dual phase single output architecture enable fast transient response to line and load changes and a significant reduction of output ripple voltage. it supports frequency synchronization, polyphase ? operation and selectable burst mode operation. the ltm4661 features a true output disconnect during shutdown and inrush current limit at start-up. it also has short-circuit, overvoltage and overtemperature protection. the ltm4661 is pb-free and rohs compliant. 5v/2a dc/dc step-up module regulator efficiency vs output current at 3.3v input applications n complete solution in <1cm 2 (single-sided pcb) or 0.5cm 2 (dual-sided pcb) n input voltage range: 1.8v to 5.5v, down to 0.7v after start-up n output voltage range: 2.5v to 15v n 4a switch current n dual phase operation n 3% maximum total dc output voltage regulation over load, line and temperature n output disconnect in shut down n inrush current limit n external frequency synchronization n selectable burst mode ? operation n output overvoltage and overtemperature protection n 6.25mm 6.25mm 2.42mm bga package n rf microwave power amplifiers n battery powered dc motors n 3.3v bus telecom transceivers all registered trademarks and trademarks are the property of their respective owners. 16 6 1 16 4661 1 4661 load current (a) 0 efficiency (%) 100 75 95 85 90 80 70 1 1.8 0.6 1.4 4661 ta01b 2 0.8 1.6 0.4 1.2 0.2 v out = 5v lt m4661 4661f
2 for more information www.linear.com/ltm4661 pin configuration absolute maximum ratings v in .............................................................. C 0.3 v to 6v v out ........................................................... C 0.3 v to 18v comp, freq ........................................ C 0. 3v to intvcc sync/mode, sdb ....................................... C 0. 3v to 6v operating internal temperature range (note 2) ............................................. C 40 c to 125 c storage temperature range .................. C 55 c to 125 c peak solder reflow body temperature ................. 250 c (note 1) 1 4 6 6 4 6 6 4 t jmax = 125c, jctop = 17c/w, jcbottom = 11c / w, jb + ba = 22c/w, ja = 22c/w weight = 0.25g order information (see pin functions, pin configuration table) http://www.linear.com/product/ltm4661#orderinfo part number pad or ball finish part marking* package type msl rating temperature range (note 2) device finish code lt m4661ey#pbf sac305 (rohs) lt m4661y e1 bga 4 C40c to 125c lt m4661iy#pbf sac305 (rohs) lt m4661y e1 bga 4 C40c to 125c lt m4661iy snpb (63/37) lt m4661y e0 bga 4 C40c to 125c ? consult marketing for parts specified with wider operating temperature ranges. *pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking: www.linear.com/leadfree ? recommended bga pcb assembly and manufacturing procedures: www .linear.com/umodule/pcbassembly ? bga package and tray drawings: www.linear.com/packaging lt m4661 4661f
3 for more information www.linear.com/ltm4661 electrical characteristics symbol parameter conditions min typ max units switching regulator section: per channel v in input dc voltage v out 2.5v l 0.7 5.5 v v in(min) minimum start-up voltage v out ?=?0v l 1.6 1.8 v out(range) output voltage range l 2.5 15 v v out(dc) output voltage, total variation with line and load r fb ?=?31.6k, sync/mode?=?intv cc v in ?=?3.3v, v out ?=?5v, i out ?=?0a to 2a l 4.85 5 5.15 v i q(vin) input supply bias current v in ?=? 3.3v, v out ?=? 5v, sync/mode? = ?intv cc , i out? =? 5ma v in ?=? 3.3v, v out ?=? 5v, sync/mode?= ?gnd, i out? =? 5ma shutdown, sdb?=?0, v in ?=?3.3v 10 8.5 0.5 ma ma a i s(vin) input supply current v in ?=?3.3v, v out ?=?5v, i out ?=?2a 3.7 a i out(dc) output continuous current range v in ?=?3.3v, v out ?=?5v (note 4) v in ?=?3.3v, v out ?=?12v 0 0 2 0.7 a a v out (line)/v out line regulation accuracy v out ?=?12v, v in ?=?1.8v to 5.5v, i out ?=?0a l 0.1 0.5 %/v v out (load)/v out load regulation accuracy v in ?=?3.3v, v out ?=?5v, i out ?=?0a to 2a l 0.1 2 % v out(ac) output ripple voltage i out ?=?0a, c out ?=?222f ceramic v in ?=?3.3v, v out ?=?5v 3 mv v out(start) turn-on overshoot i out ?=?0a, c out ?=?222f ceramic, v in ?=?3.3v, v out ?=?5v 30 mv t start turn-on time c out ?=?100f ceramic, no load, v in ?=?3.3v, v out ?=?5v 10 ms v outls peak deviation for dynamic load load: 0% to 25% to 0% of full load c out ?=?100f ceramic, v in ?=?3.3v, v out ?=?5v 200 mv t settle settling time for dynamic load step load: 0% to 25% to 0% of full load c out ?=?100f ceramic, v in ?=?3.3v, v out ?=?5v 500 us v fb voltage at v fb pin i out ?=?0a, v in ?=?3.3v, v out ?=?5v , sync/mode?= ?intv cc l 1.17 1.2 1.23 v i fb current at v fb pin (note 7) 1 50 na r fbhi resistor between v out and v fb pins 99.5 100 100.5 k duty(min) minimum duty cycle fb?=?1.4v (note 7) 0 % duty(max) maximum duty cycle fb?=?1.0v (note 7) 90 94 % sdb input voltage sdb input high sdb input low 1.2 0.35 v v i sdb sdb input current sdb?=?5.5v 1 2 ua v intvcc internal v cc voltage v in < 2.8v, v out >5v 3.9 4.25 4.6 v f osc switching frequency 1 mhz sync range sync frequency range 0.5 1.5 mhz mode/sync sync input high voltage sync input low voltage 1.6 0.35 v v i mode/sync sdb?=?5.5v 1 2 ua the l denotes the specifications which apply over the specified internal operating temperature range, otherwise specifications are at t a = 25c (note 2), v in = 3.3v, per the typical application. lt m4661 4661f
4 for more information www.linear.com/ltm4661 typical performance characteristics efficiency vs output current, v in ?=?3.3v efficiency vs output current, v in ?=?5v burst vs continuous mode efficiency, v in ?=?3.3v 5v output load transient response 12v output load transient response electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4661 is tested under pulsed load conditions such that t j ??t a . the ltm4661e is guaranteed to meet performance specifications over the 0c to 125c internal operating temperature range. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4661i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the minimum on-time condition is specified for a peak-to-peak inductor ripple current of ~40% of i max load. (see the applications information section) note 4: see output current derating curves for different v in , v out and t a . note 5: limit current into the run pin to less than 2ma. note 6: guaranteed by design. note 7: 100% tested at wafer level. note 8: the ltm4661 includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 170c when overtemperature shutdown is active. continuous operation above the specified maximum operation junction temperature may result in device degradation or failure. load current (a) 0 efficiency (%) 93 75 91 87 83 79 89 85 81 77 73 1 1.8 0.6 1.4 4661 g01 2 0.8 1.6 0.4 1.2 0.2 v out = 5v, 2a dc v out = 8v, 1a dc v out = 12v, 0.65a dc v out = 15v, 0.5a dc load current (a) 0 efficiency (%) 93 75 91 87 83 79 89 85 81 77 73 1 1.8 0.6 1.4 4661 g02 2 0.8 1.6 0.4 1.2 0.2 v out = 8v, 1.7a dc v out = 12v, 1a dc v out = 15v, 0.8a dc 500s/div v out (ac) 200mv/div load step 500ma to 1a 4661 g04 v in = 3.3v, v out = 5v f s = 1mhz (default) 500ma to 1a load step c out = 222f ceramic 500s/div v out (ac) 200mv/div load step 200ma to 400ma 4661 g05 v in = 3.3v, v out = 12v f s = 1mhz (default) 200ma to 400ma load step c out = 222f ceramic load current (a) 0 efficiency (%) 100 75 95 85 90 80 70 0.1 4661 g03 1 continuous mode burst mode operation lt m4661 4661f
5 for more information www.linear.com/ltm4661 steady state output ripple start-up waveform with no load applied start-up waveform with 0.5a load applied short-circuit response typical performance characteristics 500s/div v out (ac) 5mv/div 4661 g06 v in = 3.3v, v out = 5v f s = 1mhz (default) c out = 222f ceramic 500s/div v in 2v/div i in 200ma/div run 2v/div v out 10v/div 4661 g07 v in = 3.3v, v out = 12v f s = 1mhz (default) c out = 222f ceramic 500s/div v in 2v/div i in 200ma/div run 2v/div v out 10v/div 4661 g08 v in = 3.3v, v out = 12v f s = 1mhz (default) c out = 222f ceramic 500s/div i in 1a/div v out 5v/div 4661 g09 v in = 3.3v, v out = 12v f s = 1mhz (default) c out = 222f ceramic lt m4661 4661f
6 for more information www.linear.com/ltm4661 pin functions v in ( a1, b1, c1, d1, e1): power input pins. apply input voltage between these pins and gnd pins. recommend placing input decoupling capacitance directly between v in pins and gnd pins. v out ( a4, a5, b5, c5): power output pins of the switch - ing mode regulator. apply output load between these pins and gnd pins. recommend placing output decoupling capacitance directly between these pins and gnd pins. gnd ( a2, a3, b2 to b4, c2 to c4, d4, e2): power ground pins for both input and output returns. sync/mode (d2): burst mode operation selection pin and external synchronization input to phase detector pin. connect this pin to intv cc to operate the module in forced continuous mode. connect this pin to gnd to enable burst mode operation. a clock more than 100ns on the pin will force the module operating in continuous mode and synchronized to the external clock applied to this pin. the external clock frequency must be higher than the self-running frequency programmed by freq pin. see frequency programming in the applications information section. intv cc ( d3 ): internal regulator output. the internal power drivers and control circuits are powered from this volt - age. decouple this pin to power ground with a minimum of 2.2f low esr ceramic capacitor . the intv cc voltage is regulated at the lower of v in and 4.25v. when v in falls below 3v and v out is higher than v in , intv cc will regulate to the lower of approximately v out and 4.25v. a uvlo event occurs if intv cc drops below 1.5v, typical. freq (e3): frequency set internally to 1mhz. an external resistor can be placed from this pin to ground to increase frequency or from this pin to intv cc to reduce frequency. see the applications information section for frequency adjustment. sdb ( d5 ): shutdown control input of the module regulator. pulling this pin above 1.6v enables normal, free-running operation. forcing this pin below 0.25v shuts the regulator off, with quiescent current below 1a . do not leave this pin floating. comp (e4): current control threshold and error amplifier compensation point of the switching mode regulator. tie the comp pins together for parallel operation. the device is internal compensated. fb (e5): the negative input of the error amplifier for the switching mode regulator. internally, this pin is connected to v out with a 100k 0.5% precision resistor. different output voltages can be programmed with an additional resistor between fb and gnd pins. in polyphase operation, tying the fb pins together allows for parallel operation. see the applications information section for details. lt m4661 4661f
7 for more information www.linear.com/ltm4661 block diagram fb intv cc sync/mode sdb comp freq v in v out v in 3.3v v out 5v/2a 4661 bd 2.2f 2.2f 4.7f 2.2f 22f 47f 28k 31.6k 100k gnd v out internal comp power control 2.2h 2.2h v in operation the ltm4661 is a dual-phase single-output standalone non-isolated step-up switching mode dc/dc power supply. this module provides a precisely regulated output voltage programmable via one external resistor from 1.2v to 15v and provides up to 4a switch current (see table 1) with few external input and output ceramic capacitors. it also offers the unique ability to start up from inputs as low as 1.8v and continue to operate from inputs as low as 0.7v for output voltages greater than 2.5v. the typical applica - tion schematic is shown in figure?17. the ltm4661 contains an integrated fixed frequency, cur - rent mode regulator, power mosfets, inductor and other supporting discrete components. the default switching frequency is 1mhz . for switching noise-sensitive applica - tions, the switching frequency can be adjusted by external resistors and the module regulator can be externally synchronized to a clock at least 100ns minimum. with current mode control and internal feedback loop compensation, the ltm4661 module has sufficient stabil - ity margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. pulling the sdb pin above 1.6v enables module opera - tion and forcing it below 0.25v shuts the module off with quiescent current below 1a . at light load currents, burst mode operation can be enabled to achieve higher efficiency compared to continuous mode (ccm) by setting the sync/ mode pin to gnd. an internal 10ms soft-start limits inrush current during start-up and simplifies the design process while minimizing the number of external components. lt m4661 4661f
8 for more information www.linear.com/ltm4661 the typical ltm4661 application circuit is shown in figure?17. external component selection is primarily de - termined by the input voltage, the output voltage and the maximum load current. minimum input v oltage the ltm4661 is designed to allow start-up from input voltages as low as 1.8v. when v out exceeds 2.5v, the ltm4661 continues to regulate its output, even when v in falls as low as 0.7v. this feature extends operating times by maximizing the amount of energy that can be extracted from the input source. the limiting factors for the applica - tion become the availability of the power source to supply sufficient power to the output at the low input voltage, and the maximum duty cycle, which is clamped at 94%. in a step-up boost converter , the duty cycle can be cal - culated at: d = 1C v in ? v out where is the converter efficiency. 85% is a good estimate to start with. note that at low input voltages, voltage drops due to series resistance become critical and greatly limit the power delivery capability of the converter. output current capability the ltm4661 is designed to provide up to 4a switch cur - rent. due to the nature of the boost converter, the actually output current capability depends highly on the input/ output voltage ratio. the peak inductor current, same as switch current, in a boost converter can be calculated as : i sw = v in ? d 2 ? f s ? l + i out 1C d where d is the duty cycle showing above and f s ?=?1mhz and l?=?2.2h/2?=?1.1h. applications information based on common input and output values, table 1 lists different output current capability of the ltm4661 module. table 1. output current capability vs input voltage v in (v) 3.3 5 v out (v) 5 8 12 15 8 12 15 output current (a) 1.9 1 0.7 0.5 1.7 1 0.7 efficiency (%) 82 84 83 81 88 87 88 peak switch current (a) 4 3.8 3.9 4 3.94 4.1 4.1 output voltage programming the pwm controller has an internal 1.2v reference volt - age. as shown in the block diagram, a 100k 0.5% internal feedback resistor connects v out and fb pins together. adding a resistor r fb from fb pin to gnd, programs the output voltage: r fb = 1.2v v out C 1.2v ? 100k table 2. v fb resistor value vs various output voltages v out (v) 1.2 2.5 3.3 5 8 12 15 r fb (k) open 93.1 57.6 31.6 17.8 11.0 8.66 for parallel operation of n-piece of ltm4661 modules, the following equation can be used to solve for r fb : r fb = 1.2v v out C 1.2v ? 100k n multiphase operation the ltm4661 uses a unique dual-phase single-output architecture, rather than the conventional single phase of other boost converters. by interleaving two phases equally spaced 180 apart, both input and output current ripple get significantly reduced as well as the amount of input and output decoupling capacitor required. lt m4661 4661f
9 for more information www.linear.com/ltm4661 time (s) 0 output ripple current (a) 3.5 3.0 2.0 1.0 2.5 1.5 0.5 0 1.0 4661 f01 1.5 0.5 single phase dual phase figure?1. comparison of output ripple current with single phase and dual phase boost converter input decoupling capacitors the ltm4661 module should be connected to a low ac- impedance dc source. for each module, one piece 10f input ceramic capacitor is required for rms ripple current decoupling. bulk input capacitor is only needed when the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. the bulk capacitor can be an electrolytic aluminum capacitor and polymer capacitor. output decoupling capacitors with an optimized high frequency, high bandwidth, two phase interleaving design, only single piece of 22f low esr output ceramic capacitor is required for each ltm4661 module to achieve low output voltage ripple and very good transient response. additional output filtering may be required by the system designer, if further reduction of output ripples or dynamic transient spikes is required. the ltpowercad ? design tool is available to download online for output ripple, stability and transient response analysis. soft-start the ltm4661 contains internal circuitry to provide soft- start operation. the soft-start utilizes a linearly increasing ramp of the error amplifier reference voltage from zero to its nominal value of 1.2v in approximately 10ms, with the internal control loop driving v out from zero to its final programmed value. this limits the inrush current drawn applications information from the input source. as a result, the duration of the soft-start is largely unaffected by the size of the output capacitor or the output regulation voltage. the soft-start period is reset by a shutdown command on sdb, a uvlo event on intv cc (intv cc < 1.5v ), an overvoltage event on v out (v out 16.5v ), or an overtemperature event (tsd is invoked when the die temperature exceeds 170c). upon removal of these fault conditions, the ltm4661 will soft- start the output voltage. burst mode operation in applications where high efficiency at light load current are more important than output voltage ripple, burst mode operation could be used by connecting sync/mode pin to gnd to improve light load efficiency. the output current (i out ) capability in burst mode operation is significantly less than in continuous current mode (ccm) and varies with v in and v out , as shown in figure?2. the ltm4661 will operate in ccm mode even if burst mode operation is commanded during soft-start. in burst mode operation, only one phase of the lt m4661 is operational, while the other phase is disabled. the phase inductor current is initially charged to approximately 700ma by turning on the n-channel mosfet switch, at which point the n-channel switch is turned off and the p-channel synchronous switch is turned on, deliv - ering current to the output. when the inductor current dis charges to approximately zero, the cycle repeats. in v in , falling (v) 1 output current (ma) 300 400 5 4661 f02 200 100 250 350 150 50 0 2 3 4 1.5 0.5 2.5 3.5 4.5 5.5 v out = 2.5v v out = 5v v out = 7.5v v out = 12v v out = 15v figure?2. burst mode output current vs v in lt m4661 4661f
10 for more information www.linear.com/ltm4661 burst?mode operation, energy is delivered to the output until the nominal regulation value is reached, then the lt m4661 transitions into a very low quiescent current sleep state. in sleep, the output switches are turned off and the lt m4661 consumes only 25a of quiescent current. when the output voltage droops approximately 1%, switching resumes. this maximizes efficiency at very light loads by minimizing switching and quiescent losses. output voltage ripple in burst mode operation is typically 1% to 2% peak-to-peak. additional output capacitance ( 22f or greater), or the addition of a small feedforward capacitor ( 10pf to 50pf ) connected between v out and fb, can help further reduce the output ripple. operation frequency the operating frequency of the ltm4661 is optimized to achieve the compact package size and the minimum output ripple voltage while still keeping high efficiency. the default operating frequency is internally set to 1mhz. in most ap - plications, no additional frequency adjusting is required. if any operating frequency other than 1mhz is required by application, the operating frequency can be increased by adding a resistor, r fset , between the freq pin and gnd, as shown in figure?18. the operating frequency can be calculated as: f s mhz ( ) = 28 + r f set k ( ) r f set k ( ) frequency synchronization the switching frequency of the ltm4661 can be synchro - nized to a desired frequency by applying a clock of twice the desired frequency to the sync/mode pin. also, the free running frequency needs to be adjusted to a frequency approximately 80% of the desired frequency . please use the equation in the operation frequency section to calculate the external r fset resistor value. for example, if the ltm4661 needs to be synchronized to 1.5mhz switching frequency, an external clock of 3mhz needs to supply to sync/mode pin while adding a 140k r fset resistor between freq pin and gnd to program the free run frequency to 1.2mhz. shutdown the boost converter is disabled by pulling sdb below 0.25v and enabled by pulling sdb above 1.6v. note that sdb pin can be driven above v in or v out , as long as it is limited to less than its absolute maximum rating. thermal shutdown if the die temperature exceeds 170 c typical, the ltm4661 will go into thermal shutdown (tsd). all switches will be shut off until the die temperature drops by approximately 7c, when the device reinitiates a soft-start and switching is re-enabled. output disconnect the ltm4661 s output disconnect feature eliminates body diode conduction of the internal p-channel mosfet recti - fiers. this feature allows for v out to discharge to 0v during shutdown and draw no current from the input source. inrush current will also be limited at turn-on, minimizing surge currents seen by the input supply. the output disconnect feature also allows v out to be pulled high, without back- feeding the power source connected to v in . short-circuit protection the ltm4661 output disconnect feature allows output short-circuit protection while maintaining a maximum set current limit. to reduce power dissipation under overload and short-circuit conditions, the peak switch current limits are reduced to approximately 2a . once v out exceeds approximately 1.5v , the current limits are reset to their nominal values of 3.5a peak switching current per phase. output overvoltage protection an overvoltage condition occurs when v out exceeds approximately 16.5v . switching is disabled and the in - ternal soft-start ramp is reset. once v out drops below approximately 16v , a soft-start is initiated and switching is allowed to resume. if the boost converter output is lightly loaded such that the time constant of the output capacitance, c out and the output load resistance, r out is near or greater than the soft-start time of approximately 10ms, the soft-start ramp may end before or soon after applications information lt m4661 4661f
11 for more information www.linear.com/ltm4661 switching resumes, defeating the inrush current limiting of the closed-loop soft-start following an overvoltage event. thermal considerations and output current derating the thermal resistances reported in the pin configuration section of the data sheet are consistent with those param - eters defined by jesd51-9 and are intended for use with finite element analysis (fea) software modeling tools that leverage the outcome of thermal modeling, simulation and correlation to hardware evaluation per formed on a module package mounted to a hardware test boardalso defined by jesd51-9 ( test boards for area array surface mount package thermal measurements). the motivation for providing these thermal coefficients in found in je sd51-12 (guidelines for reporting and using electronic package thermal information). many designers may opt to use laboratory equipment and a test vehicle such as the demo board to anticipate the module regulator s thermal performance in their ap - plication at various electrical and environmental operating conditions to compliment any fea activities. without fea software, the thermal resistances reported in the pin con - figuration section are in and of themselves not relevant to providing guidance of thermal per formance ; instead, the derating curves provided in the data sheet can be used in a manner that yields insight and guidance pertaining to ones application usage and can be adapted to correlate thermal performance to ones own application. the pin configuration section typically gives four thermal coefficients explicitly defined in jesd51-12; these coef - ficients are quoted or paraphrased below: 1. ja , the thermal resistance from junction to ambi - ent, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd51-9 defined test board, which does not reflect an actual application or viable operating condition. 2. jcbottom , the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd51-9 defined test board, which does not reflect an actual application or viable operating condition. 3. jctop , the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. 4. jb , the thermal resistance from junction to the printed circuit board, is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module and into the board, and is really the sum of the jcbottom and the thermal re - sistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd51-9. a graphical representation of the aforementioned ther - mal resistances is given in figure?3 ; blue resistances are contained within the module regulator, whereas green resistances are external to the module. a s a practical matter, it should be clear to the reader that no individual or subgroup of the four thermal resistance parameters defined by je sd51 -12 or provided in the pin configuration section replicates or conveys normal op - erating conditions of a module. for example, in normal b o ard-mounted applications, never does 100% of the device s total power loss (heat) thermally conduct exclu - sively through the top or exclusively through bottom of the applications information lt m4661 4661f
12 for more information www.linear.com/ltm4661 module as the standard defines for jctop and jcbottom , respectively. in practice, power loss is thermally dissipated in both directions away from the package granted, in the absence of a heat sink and airflow, a majority of the heat flow is into the board. within a sip (system-in-package) module, be aware there are multiple power devices and components dissipating power, with a consequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. to reconcile this complication without sacrificing modeling simplicitybut also, not ignoring practical realitiesan approach has been taken using fea software modeling along with laboratory testing in a controlled-environment chamber to reasonably define and correlate the thermal resistance values supplied in this data sheet: (1) initially, fea software is used to accurately build the mechanical geometry of the module and the specified pcb with all of the correct material coefficients along with accurate power loss source definitions ; (2) this model simulates a software-defined jedec environment consistent with jesd51-9 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the jedec-defined thermal resistance values; (3) the model and fea software is used to evaluate the module with heat sink and airflow ; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermocouples within a controlled-environment chamber while operating the device at the same power loss as that which was simulated. an outcome of this process and due diligence yields a set of derating curves provided in other sections of this data sheet. after these laboratory tests have been performed and correlated to the module model, then the jb and ba are summed together to correlate quite well with the module model with no airflow or heat sinking in a properly defined chamber. this jb ?+? ba value is shown in the pin configuration section and should accurately equal the ja value because approximately 100% of power loss flows from the junc - tion through the board into ambient with no airflow or top mounted heat sink. the 5v , 8v, 12v and 15v output power loss curves in figures?4 to?7 can be used in coordination with the load current derating curves in figures?8 to 14 for calculating an approximate ja thermal resistance for the ltm4661 with various heat sinking and airflow conditions. the power loss curves are taken at room temperature and are increased with multiplicative factors according to the ambient temperature. these approximate factors is 1.4 assuming the junction temperature at 110c. the output voltages are chosen to include the lower and higher out - put voltage ranges for correlating the thermal resistance. thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal modeling analysis. the junction temperatures are monitored while ambient temperature is increased with and without airflow. the power loss increase with ambient temperature change is factored into the derating applications information figure?3. graphical representation of jesd51-12 thermal coefficients 4661 f03 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance lt m4661 4661f
13 for more information www.linear.com/ltm4661 curves. the junctions are maintained at 110c maximum while lowering output current or power with increasing ambient temperature. the decreased output current will decrease the internal module loss as ambient temperature is increased. the monitored junction temperature of 110 c minus the ambient operating temperature specifies how much module temperature rise can be allowed. as an ex - ample, in figure?13 the load current is derated to ~0.35a at ~ 80c with no air or heat sink and the power loss for the 3.3v to 15v at 0.35a output is about 1.4w. the 1.4w loss is calculated with the ~1.0w room temperature loss from the 3.3v to 15v power loss curve at 0.35a, and the 1.4 multiplying factor. if the 80c ambient temperature is subtracted from the 110c junction temperature, then the difference of 30c divided by 1.4w equals a 21.4c/w ja thermal resistance. table 3 specifies a 21c/w value which is very close. table 3 to table 6 provide equivalent thermal resistances for 5v, 8v, 12v and 15v outputs with and without airflow and heat sinking. the derived thermal resistances in tables 3 to 6 for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. room temperature power loss can be derived from the efficiency curves in the typical performance characteristics section and adjusted with the above ambient temperature mul - tiplicative factors. the printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper all four layers. the pcb dimensions are 65mm 65mm. applications information applications information figure?4. 5v output power loss figure?5. 8v output power loss figure?6. 12v output power loss figure?7. 15v output power loss figure?8. 3.3v to 5v derating curve, no heat sink figure?9. 3.3v to 8v derating curve, no heat sink load current (a) 0 power loss (w) 3 0.2 1.8 1.4 1 0.6 1.6 1.2 2.8 2.4 2 2.6 2.2 0.8 0.4 0 1 1.8 0.6 1.4 4661 f04 2 0.8 1.6 0.4 1.2 0.2 3.3v input load current (a) 0 power loss (w) 2 0.2 1.8 1.4 1 0.6 1.6 1.2 0.8 0.4 0 1 1.8 0.6 1.4 4661 f05 2 0.8 1.6 0.4 1.2 0.2 3.3v input 5v input ambient temperature (c) 30 load current (a) 2.5 2 1 1.5 0.5 0 80 60 100 4661 f08 110 70 50 90 40 0lfm 200lfm 400lfm load current (a) 0 power loss (w) 2 0.2 1.8 1.4 1 0.6 1.6 1.2 0.8 0.4 0 0.5 0.9 0.3 0.7 4661 f06 1 0.4 0.8 0.2 0.6 0.1 3.3v input 5v input ambient temperature (c) 30 load current (a) 1.2 1 0.8 0.2 0.4 0.6 0 80 60 100 4661 f09 110 70 50 90 40 0lfm 200lfm 400lfm load current (a) 0 power loss (w) 2 0.2 1.8 1.4 1 0.6 1.6 1.2 0.8 0.4 0 0.5 0.9 0.3 0.7 4661 f07 1 0.4 0.8 0.2 0.6 0.1 3.3v input 5v input lt m4661 4661f
14 for more information www.linear.com/ltm4661 applications information figure?10. 5v input to 8v output derating curve, no heat sink figure?11. 3.3v input to 12v output derating curve, no heat sink figure?12. 5v input to 12v output derating curve, no heat sink figure?13. 3.3v input to 15v output derating curve, no heat sink figure?14. 5v input to 15v output derating curve, no heat sink ambient temperature (c) 30 load current (a) 1.8 1.4 1.0 0.2 0.4 0.6 1.6 1.2 0.8 0 80 60 100 4661 f10 110 70 50 90 40 0lfm 200lfm 400lfm ambient temperature (c) 30 load current (a) 0.8 0.6 0.7 0.5 0.4 0.1 0.2 0.3 0 80 60 100 4661 f11 110 70 50 90 40 0lfm 200lfm 400lfm ambient temperature (c) 30 load current (a) 0.9 0.8 0.6 0.7 0.4 0.2 0.5 0.3 0.1 0 70 50 90 4661 f14 110 60 100 40 80 0lfm 200lfm 400lfm ambient temperature (c) 30 load current (a) 1.2 1 0.6 0.8 0.4 0.2 0 70 50 90 4661 f12 110 60 100 40 80 0lfm 200lfm 400lfm ambient temperature (c) 30 load current (a) 0.6 0.5 0.4 0.1 0.2 0.3 0 80 60 100 4661 f13 110 70 50 90 40 0lfm 200lfm 400lfm lt m4661 4661f
15 for more information www.linear.com/ltm4661 table 3. 5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figure?8 3.3 figure?4 0 none 21 figure?8 3.3 figure?4 200 none 19 figure?8 3.3 figure?4 400 none 18 table 4. 8v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 9, 10 3.3, 5 figure?5 0 none 21 figures?9, 10 3.3, 5 figure?5 200 none 19 figures?9, 10 3.3, 5 figure?5 400 none 18 table 5. 12v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 11, 12 3.3, 5 figure?6 0 none 21 figures?11, 12 3.3, 5 figure?6 200 none 19 figures?11, 12 3.3, 5 figure?6 400 none 18 table 6. 15v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures?13, 14 3.3, 5 figure?7 0 none 21 figures?13, 14 3.3, 5 figure?7 200 none 19 figures?13, 14 3.3, 5 figure?7 400 none 18 applications information lt m4661 4661f
16 for more information www.linear.com/ltm4661 figure? 15 shows a measured thermal picture of the ltm4661 running from 3.3v input to 12v output at 0.8a dc current with 200lfm airflow and no heat sink. figure?15. thermal image, 3.3v input to 12v output at 0.8a, 200lfm air flow, no heat sink safety considerations the ltm4661 modules do not provide galvanic isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. the device does support thermal shutdown and overcurrent protection. layout checklist/example the high integration of ltm4661 makes the pcb board layout very simple and easy. however, to optimize its electri - cal and thermal performance, some layout considerations are still necessar y . ? use large pcb copper areas for high current paths, including v in , gnd and v out . it helps to minimize the pcb conduction loss and thermal stress. ? place high frequency ceramic input and output capaci - tors next to the v in , pgnd and v out pins to minimize high frequency noise. ? place a dedicated power ground layer underneath the unit. ? to minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. ? do not put vias directly on the pad, unless they are capped or plated over. ? for parallel modules, tie the v out , v fb and comp pins together. use an internal layer to closely connect these pins together. ? bring out test points on the signal pins for monitoring. figure?16 gives a good example of the recommended layout. applications information figure?16. recommended pcb layout vin gnd gnd vout 4661 f16 lt m4661 4661f
17 for more information www.linear.com/ltm4661 applications information figure?17. 3.3v input to 5v output, at 2a design figure?18. 3.3v to 5v input, 12v output design with external clock figure?19. two ltm4661 module parallel design for 8v/2a output running at 1.2mhz c out 22f 2 16v c in 22f 2 6.3v r1 31.6k 4661 f17 2.2f ltm4661 v out fb v out 5v/2a v in sdb mode/sync intv cc freq comp gnd v in 3.3v c out 22f 2 25v c in 22f 2 6.3v r2 11k 140k 4661 f18 3mhz clock switching frequency = clock frequency/2 2.2f ltm4661 v out fb v out 12v/0.8a v in sdb mode/sync intv cc freq comp gnd v in 3.3v to 5v 22f 2 25v 22f 2 6.3v 8.87k 4661 f19 22f 2 25v 22f 2 6.3v ltc6802 set to 2-phase 2.4mhz clock output switching frequency = clock frequency/2 1f 83.5k 2.2f 2.2f ltm4661 v out fb v in sdb mode/sync intv cc freq comp gnd ltm4661 v out fb v out 8v/2a v in sdb mode/sync intv cc ltc6902 v+ div ph out1 out2 10 9 8 7 6 set mod gnd out4 out3 1 2 3 4 5 freq comp comp comp gnd v in 3.3v to 5v intv cc intv cc lt m4661 4661f
18 for more information www.linear.com/ltm4661 package description ltm4661 component bga pinout pin id function pin id function pin id function pin id function pin id function a1 v in a2 gnd a3 gnd a4 v out a5 v out b1 v in b2 gnd b3 gnd b4 gnd b5 v out c1 v in c2 gnd c3 gnd c4 gnd c5 v out d1 v in d2 sync/mode d3 intv cc d4 gnd d5 sdb e1 v in e2 gnd e3 freq e4 comp e5 fb package row and column labeling may vary among module products. review each package layout carefully. lt m4661 4661f
19 for more information www.linear.com/ltm4661 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. package description please refer to http://www.linear.com/product/ltm4661#packaging for the most recent package drawings. package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes suggested pcb layout top view 0.000 2.540 1.270 1.270 2.540 0.630 0.025 2.540 1.270 2.540 1.270 0.3175 0.3175 0.000 e d c b a 12345 pin 1 notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature ?b (25 places) a detail b package side view m x yzddd m zeee a2 d e e b f g detail a 0.3175 0.3175 bga 25 0517 rev a ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? bga package 25-lead (6.25mm 6.25mm 2.42mm) (reference ltc dwg # 05-08-1502 rev a) 6 see notes symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 2.22 0.50 1.72 0.60 0.60 0.27 1.45 nom 2.42 0.60 1.82 0.75 0.63 6.25 6.25 1.27 5.08 5.08 0.32 1.50 max 2.62 0.70 1.92 0.90 0.66 0.37 1.55 0.15 0.10 0.20 0.30 0.15 total number of balls: 25 dimensions notes ball ht ball dimension pad dimension substrate thk mold cap ht z 5. primary datum -z- is seating plane 6 package row and column labeling may vary among module products. review each package layout carefully ! detail b substrate a1 ccc z z // bbb z h2 h1 b1 mold cap lt m4661 4661f
20 for more information www.linear.com/ltm4661 lt 1117 ? printed in usa www.linear.com/ltm4661 ? analog devices, inc. 2017 design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products search 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power search parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management analog devicess family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. related parts package photo part number description comments ltm8054 36v in , 5.4a buck-boost module regulator 5v v in 36v, 1.2v v out 36v, 11.25mm??15mm??3.42mm bga ltm8045 sepic (boost) or inverting module regulator 2.8v v in 18v. 2.5v v out 15v, i out is up to 700ma. 6.25mm??11.25mm?x?4.92mm bga ltm8049 dual, sepic (boost) and/or inverting module regulator 2.6v v in 20v, 2.5v v out 24v, i out is up to 1.5a, 9mm??15mm??2.42mm bga ltm4622 ultrathin, 20v in , dual 2.5a step-down module regulator 3.6v v in 20v, 0.6v v out 5.5v, 6.25mm 6.25mm 1.82mm lga, 6.25mm??6.25mm??2.42mm bga LTM4643 ultrathin, 20v in , quad 3a step-down module regulator 4v v in 20v, 0.6v v out 3.3v, 9mm 15mm??1.82mm lga, 9mm??15mm??2.42mm bga lt m4661 4661f

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